The present invention relates to an architecture of an independent clocking local area network (LAN), i.e., a local area network (hereinafter abbreviated as a LAN) in which each node has an independent clock source of a clock signal and an information signal is sent out using an oscillated clock signal, and more particularly, to an architecture of a multimedia LAN in which any data transfer error due to jitter accumulation is not generated even when the quantity of connected nodes is increased.
In a LAN, a plurality of node devices (hereinafter simply referred to as nodes) are connected with one another with a single transmission line and high speed information transmission and switching function are realized efficiently in a limited service area, and variety types of LANs have been put to practical use. A ring type LAN having a transmission line in a ring form and a bus type LAN using a transmission line in a bus form are typical. In such a LAN construction, a synchronous system becomes an issue. Ideally, it is preferable that all the nodes constituting a LAN are operated with a same clock signal (hereinafter simply referred to as a clock). In case all the nodes are in operation with the same clock, the rate of sending information and the rate of receiving information are equal to each other. Therefore, transmission and reception of information become possible without providing a buffer therebetween. As such a LAN in which all the nodes are operated with the same clock, the standard IEEE 802.5 ("Token ring") (a document ANSI/IEEE Std 802.5-1985 ISO/DP 8802/5 "LOCAL AREA NETWORKS Token Ring Access Method") is a typical well-known example. In respective nodes in a LAN of above-mentioned standard IEEE 802.5, clock components included in a received signal from a previous (transmission) node are regenerated by means of a phase lock loop (PLL), regenerated clock is supplied into a receiving node, and further, information is sent out to a next node by abovementioned regenerated clock (master-slave synchronization). The clock for synchronization is repeated at respective nodes as described above, makes a round in the ring, and the whole system becomes to be operated synchronously with a synchronous clock generated by a master node. Since the clock is regenerated and repeated in respective nodes, however, the jitter generated at the time of regeneration and transfer of the clock is accumulated. Since received data are regenerated by the clock having such jitter, such a problem arises that received data are not regenerated correctly when the jitter becomes larger. The quality of connectable nodes is limited in many cases in point of operation by such jitter accumulation.
In order to avoid jitter accumulation, there is an (independent synchronizing) system in which regeneration and transfer of the clock is not performed, each of respective nodes has an independent clock source, respectively, and an information signal is sent out using an oscillated clock. For example, this system is described in detail in the standard FDDI-I (a document ISO/IEC JTCl SC13 N477; Draft for ISO 9314-1: Fiber Distributed Data Interface (FDDI) Token Ring Physical Layer Protocol (PHY)).
In FDDI-I, however, the information signal transmitted in the LAN is asynchronous information, viz., only the information which is not required to be sent periodically, and the information is transmitted and received with a frame for sending information (hereinafter referred to as a frame) (4,500 bytes maximum) as a unit. A blank of 8 bytes and more is put between mutual frames, and the difference in clock frequencies between nodes is absorbed by increasing and decreasing the size of the blank portion. Thus, it is possible for respective nodes to conduct communication without giving rise to overflow or underflow by regenerating and repeating data only.
The above-mentioned independent clocking system is a system which is applicable only to a LAN which supports asynchronous data only. Recently, however, demand for a high speed LAN called a multimedia backbone LAN which is able to transmit and switch not only asynchronous data, but also synchronous information is increasing. (Information, voice and data which are required to transmit a predetermined quantity periodically are typical examples. These may be handled as asynchronous information, but buffering processing and the like are required to guarantee periodicity at transmit-receive terminals, causing handling to become complicated.) Such a multimedia backbone LAN accommodates a low speed, asynchronous-data-dedicated LAN such as the standard IEEE 802.3, 802.4 and 802.5 and FDDI-I which is a high speed LAN so as to realize information transmission and switching function among LANs, and also supports information transfer among synchronous apparatuses such as a PBX (private branch exchange) and a TDM (time division multiplexer) so as to realize an integrated private network. Existing synchronous apparatuses are designed on the premise that these apparatuses are operated with the same synchronizing clock when they are interconnected. Accordingly, in a network including such synchronous apparatuses it is required to supply a synchronizing clock to synchronous apparatuses from the network through nodes. Further, since it is required to transfer information periodically and at a same rate among synchronous apparatuses, it is preferable that an information quantity applied to respective nodes is made equal in the whole system. Thus, it is required to supply a synchronizing clock which is common to all nodes.
As a result, a master-slave synchronization system which is easy to be constructed has been heretofore employed for synchronization of the multimedia LAN. As a document related to such a technique, "A 1.2 Gbps optical loop LAN for wideband office communications" IEEE Global Telecommunications Conference 1985, 15-4, may be mentioned.
In the above-mentioned LAN of master-slave synchronization system, the synchronizing clock is distributed by the fact that the clock generated by a master node is regenerated and repeated by respective nodes. In this system, since all nodes are operated with a common synchronizing clock, it is easy to connect synchronous apparatuses with one another. Since jitter is accumulated as described previously, however, there is such a drawback that the number of connectable nodes is limited.
As another system for solving the jitter accumulation problem in the multimedia LAN, an independent clocking system in which respective nodes send out signals to a transmission line using clocks oscillated in respective stations is possible. In the multimedia LAN, however, it is necessary to devise how to include the synchronous apparatuses, unlike the synchronous-data-dedicated LAN. For example, it is being examined to employ an independent clocking system in the standard FDDI-II which is being standardized by the American National Standards Institute (ANSI) at present described in detail in a document: "FDDI Hybrid Ring Control, Draft proposed American Standard, Jan. 20, 1989". FIG. 15 shows a construction of a transfer frame (referred to as a cycle in FDDI-II) adopted in FDDI-II. The information is transferred while being embedded in a transfer frame of a fixed period. The frame is composed of a preamble, a cycle header and an information portion. The period of the frame is at 125 .mu.s (1/8 KHz). Further, the information transmission rate is at 100 Mb/s, but information in 4 bits is sent out after converting into 5 bits (4B/5B code) for the purpose of removing DC frequency components on a transmission line and transmission of specific codes (for detection of frame boundary and control signals). Therefore, the physical transmission rate is at 125 Mb/s. The number of bits in the preamble space is different depending on oscillation frequency deviation of clocks of respective nodes, but the number of bits is adjusted so that the cycle period becomes 125 .mu.s. The master node creates the frame period based on an external clock or an oscillation frequency of the own station. In each node, a synchronizing clock is extracted from a received signal using a PLL, a tank circuit and the like. It becomes possible to receive information in a frame by receiving the received signal correctly and detecting a synchronous pattern in the cycle header using the extracted clock.
In a proposal in the above-mentioned standard of FDDI-II, the oscillation frequency deviation of each node is adjusted by adjusting the length of the preamble portion between frames, and periodic data transfer is realized by introducing a frame construction.
It is required for a multimedia LAN to distribute the same synchronizing clock among synchronous apparatuses through the nodes in order to transmit not only asynchronous information, but also synchronous information as described previously. Accordingly, there is a problem as a synchronous system in both systems of the above-mentioned master-slave synchronization system and FDDI-II system of independent clocking. That is, restriction on the number of nodes due to jitter accumulation described previously becomes an issue in the master-slave synchronization system.
In the FDDI-II system, there are such problems as described hereunder.
A first problem is that the system is weak against a transmission error on the transmission line. In a high speed LAN, an optical fiber is used for transmission, but a bit error rate in optical transmission is usually around 10.sup.-9. Such a bit error generated at random or in a burst form should never be enlarged by the network. In the FDDI-II system, a starting point of each frame is recognized by detecting a specific bit pattern which does not exist in the information, and there is a possibility that an error of one frame portion is generated by the bit error at this portion. Further, the length of an outputted frame is determined by the length of a received frame in each node, and there is also a possibility that a frame recognition error of one node extends to a plurality of nodes.
A second problem exists in that a physical transmission rate becomes higher than a logical information transfer rate. This is caused by the fact that 4-bit information is transmitted after coding into a 5-bit transmission code because a specific bit pattern which does not appear in the information portion is used for frame recognition. In FDDI-II, the physical transmission rate is set at 125 Mb/s against the information transfer speed of 100 Mb/s, and only 80% of the transmission band is utilized for actual information transfer.
A third problem is that frame processing becomes complicated because a frame is of a variable length.